Yield and cost have always been critical factors for both manufacturers and designers of semiconductor products. Meeting yield and product cost targets is a continuous challenge, due to new device ...

Temporally and spatially dense data-rich environments provide unprecedented opportunities and challenges for effective process control. In this article, we propose a systematic and scalable adaptive ...

Design Rule Checking (DRC) is a physical design process to determine if chip layout satisfies a number of rules as defined by the semiconductor manufacturer. Each semiconductor process will have its ...