EDN

IC Performance: Challenges in Layout with CMOS Technology Nodes

Editor’s note: I am pleased to bring you an important technical blog by Fernando Lavalle, a Ph.D. student at Texas A&M University and his colleague, Suraj Prakash, who have been working and studying ...
EDN

A Designer’s Guide to CMOS RF Models

In recent years we have begun to see references to “RF” CMOS processes and to “RF” models for those processes. This article will explore what the real meanings of such “RF” designations are, and what ...
Design-Reuse

Mixed-signal design flow enables RF CMOS chip

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...
mccormick.northwestern.edu

COMP_ENG 391: CMOS VLSI Circuits Design

Design of CMOS digital integrated circuits, concentrating on device, circuit, and architectural issues. Analysis and design techniques in custom integrated circuit design, standard cells, memory. Use ...